With the boom in AI/ML, both the model sizes and the amounts of data that need to be fed to these models are increasing exponentially. For instance, early Large Language Models (LLMs) such as GPT–2 (released in 2019) had 1.5 billion parameters whereas more recent GPT–4 (released in 2023) has close to 1.8 trillion parameters — a 1000x increase in less than 4 years! This exponential growth has prompted massively large-scale distributed computations inside datacenters, to accomplish tasks such as LLM training, thus demanding extremely high bandwidth networks to ensure no communication bottlenecks. Unfortunately, with the slowdown in transistor scaling, traditional silicon-based packet-switched datacenter networks are finding it extremely challenging to keep up with the growing bandwidth demands. Reconfigurable networks, powered by optical circuit switch technology, promise unlimited bandwidth to meet the demands of both present and future AI/ML workloads. As a result, there has been growing interest, both in academia and industry (e.g., Google), to study and deploy reconfigurable networks in datacenters.

The goal of the workshop is to bring together leading researchers and practitioners from around the globe to discuss the state of reconfigurable networking — covering architecture, algorithms, protocols, software systems, and hardware to enable reconfigurable networking in datacenters — and lay out a vision for future research directions in this field.

The workshop is generously funded by the National Science Foundation, Awards #2402851 and #2402852.